DocumentCode
319508
Title
Parallel calculations in the multivalued logic
Author
Malyugin, V.D. ; Veits, A.V. ; Sokolov, V.V.
Author_Institution
Inst. of Control Sci., Acad. of Sci., Moscow, Russia
Volume
1
fYear
1997
fDate
9-12 Sep 1997
Firstpage
266
Abstract
The complexity of conversions and calculations in the multivalued (k-digit) logic compels one to seek representations of initial data which would allow the application of binary logic. The underlying solution of the problem includes three stages: (i) the binary representation of k-digit functions; (ii) the joint description of a system of logical functions; and (iii) the procedure of parallel calculations
Keywords
logic design; multivalued logic; binary logic; binary representation; initial data representations; k-digit functions; logical functions; multivalued logic; parallel calculations; Arithmetic; Multivalued logic; Polynomials;
fLanguage
English
Publisher
ieee
Conference_Titel
Information, Communications and Signal Processing, 1997. ICICS., Proceedings of 1997 International Conference on
Print_ISBN
0-7803-3676-3
Type
conf
DOI
10.1109/ICICS.1997.647100
Filename
647100
Link To Document