• DocumentCode
    3195453
  • Title

    An Efficient Overlapping Event Generation Method for Symmetric System Testing

  • Author

    Bakchowde, Devraj Kallappa ; Kishore, A.S.N.

  • Author_Institution
    Nokia Siemens Networks - Technol. Centre, Bangalore, India
  • fYear
    2011
  • fDate
    5-7 Dec. 2011
  • Firstpage
    56
  • Lastpage
    59
  • Abstract
    In a time invariant system with finite events, the possible scenarios are defined by the events and the relative delay between the events. System behavior testing with overlapping events requires all non-redundant scenarios to be generated and utilized for testing. In this work, non-redundant set of scenarios are derived for a symmetric system. A method for generating the scenarios efficiently with granularity control is proposed. An example of the method applied for testing of a symmetric multiprocessing (SMP) multi-core system with multiple peripherals is given. We also describe the improvements for symmetric system method over asymmetric system.
  • Keywords
    integrated circuit testing; microprocessor chips; system-on-chip; granularity control; overlapping event generation method; overlapping events; symmetric system testing; system behavior testing; Delay; Equations; Mathematical model; System-on-a-chip; Testing; Time invariant systems; Efficient event generation; Multi event symmetric system testing; Overlapping events simulation; Symmetric multiprocessing multi-core testing; Time invariant symmetric system testing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Microprocessor Test and Verification (MTV), 2011 12th International Workshop on
  • Conference_Location
    Austin, TX
  • ISSN
    1550-4093
  • Print_ISBN
    978-1-4577-2101-4
  • Type

    conf

  • DOI
    10.1109/MTV.2011.20
  • Filename
    6142346