The high-speed ADC based on the adjustable digital trimming technique

Unlike the traditional trimming techniques, such as fuse, laser and E²PROM trimming, an iterative scheme based on the digital trimming is adopted for improving the static and the dynamic parameters of the ADC device in this paper. This trimming technique is able to adjust the reference voltage, the common-mode voltage, and the current by changing the topology of the capacity or resistor array with the trimming data. The changes of the topology of circuit are achieved by controlling the switches on or off in the capacity or resistor array, while the switches are controlled by the trimming data. This trimming technique has a lot of advantages, such as repeatability, flexibility, and high efficiency. From the experiment, the ADC device based on the 0.35 BiCMOS process has a SFDR up to 65 dB, INL up to 0.26 LSB, and DNL up to 0.35 LSB at sampling rate of 250 MSPS.