• DocumentCode
    3196729
  • Title

    Simulation and parameters optimization of power DMOS Trench Field Effect Transistors

  • Author

    Baranov, Valentine V. ; Belous, Anatoly I. ; Krechko, Michail M. ; Roubtsevich, Ivan I. ; Tourtsevich, Arkady S.

  • Author_Institution
    Belarusian State Univ. of Inf. & Radioelectron., Minsk, Belarus
  • fYear
    2010
  • fDate
    13-16 Sept. 2010
  • Firstpage
    1
  • Lastpage
    3
  • Abstract
    DMOS Trench Field Effect Transistors (TrenchFETs) have been taken as an object for electrical parameters optimization with the special developed software based on Excel table processor. Using this software the values of resistance between the source areas and the drain area of the open DMOS TrenchFET have been minimized as well as the values of the output and the internal capacitance of the cell transistor structure. The efficiency of the developed software is proved by the results of testing the manufactured series of DMOS TrenchFETs as their electrical parameters correspond to the best world known analogues.
  • Keywords
    MOS integrated circuits; capacitance; field effect transistors; isolation technology; DMOS trenchFET; Excel table processor; cell transistor structure; electrical parameter optimization; internal capacitance; power DMOS trench field effect transistor; Epitaxial growth; Lead; Logic gates; Transistors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Electronic System-Integration Technology Conference (ESTC), 2010 3rd
  • Conference_Location
    Berlin
  • Print_ISBN
    978-1-4244-8553-6
  • Electronic_ISBN
    978-1-4244-8554-3
  • Type

    conf

  • DOI
    10.1109/ESTC.2010.5642831
  • Filename
    5642831