DocumentCode :
3196765
Title :
A template mapping algorithm for reconfigurable computing
Author :
Wang, Yansheng ; Yin, Shouyi ; Wei, Shaojun
Author_Institution :
Inst. of Microelectron., Tsinghua Univ., Beijing
fYear :
2008
fDate :
25-27 May 2008
Firstpage :
1392
Lastpage :
1396
Abstract :
RCA(reconfigurable cell array) is a hardware accelerating set. In order to find out set of computations which could exert the capacity of RCA in DFG(data flow graph), reducing the execution time of system to accomplish a specific arithmetic, a template mapping algorithm is proposed. It could be used to find RCApsilas templates in DFG. Compare to previous template mapping algorithm, the new algorithm has two applied features: mapping node with more than one input; mapping template with ring structure in graph. C++ code is accomplished to validate the correctness of algorithm.
Keywords :
C++ language; data flow graphs; reconfigurable architectures; C++ code; data flow graph; hardware accelerating set; reconfigurable cell array; reconfigurable computing; template mapping algorithm; Acceleration; Arithmetic; Concurrent computing; Flow graphs; Hardware; Information science; Laboratories; Microelectronics; Qualifications; Tree graphs;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Communications, Circuits and Systems, 2008. ICCCAS 2008. International Conference on
Conference_Location :
Fujian
Print_ISBN :
978-1-4244-2063-6
Electronic_ISBN :
978-1-4244-2064-3
Type :
conf
DOI :
10.1109/ICCCAS.2008.4658026
Filename :
4658026
Link To Document :
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