Mechanical issues induced by Electrical Wafer Sort: Correlations from actual tests, nanoindentation and 3D dynamic modeling

Electrical Wafer Sort (EWS) is known to induce stress in the pad structure that can lead to mechanical failures. During the current study, various interconnect designs and stacking (thicknesses and copper layer architectures) are investigated through actual tests, nanoindentation and finite element modeling tools. Firstly, a dedicated design of experiment is set up and samples are probed. The failure analyses following the parametric test allow the ranking of the interconnect structures according to their mechanical robustness. Cracks are also observed with dedicated imaging tools to improve the understanding of the failure mechanisms. Then, nanoindentation with both Berkovich and cube corner tips is performed to mimic fracture occurrences. The former tip reproduces the failures observed during the tests in the oxide layers, and the load-displacement curves made with the latter are post processed using in-house indicators to weight the structures. On the other hand, a 3D finite element model is developed to reproduce the transient dynamic phenomena during probing. A stress analysis is performed in the layers of interest to rank the structures. A good agreement between all the techniques is found for most of the parameters, showing the ability of both the nanoindentation and the numerical modeling to reproduce EWS and forecast related failures. Indeed, the fracture hazard is reduced while increasing either the aluminium or pad open thicknesses. The design of the copper layer is also evaluated and lower cracks occurrence is found in pad layouts with small slotted lines compared to pad layouts with bigger slotted lines or to long lines. Both techniques are helpful to reduce the reliability issues in pad structures, and to investigate solutions with improved tests cycle time and reduced qualification costs.