DocumentCode :
3198002
Title :
Introducing control-flow inclusion to support pipelining in custom instruction set extensions
Author :
Zuluaga, Marcela ; Kluter, Theo ; Brisk, Philip ; Topham, Nigel ; Ienne, Paolo
Author_Institution :
Inst. for Comput. Syst. Archit., Univ. of Edinburgh, Edinburgh, UK
fYear :
2009
fDate :
27-28 July 2009
Firstpage :
114
Lastpage :
121
Abstract :
Multicycle instruction set extensions (ISE) can be pipelined in order to increase their throughput; however, typical program traces seldom contain consecutive calls to the same ISE that would allow this temporal parallelism. Often, there are intermittent calls to branch instructions, at a minimum, that prevent the pipelined execution of subsequent calls to the same ISE within a loop. What is needed is ISEs that cover an entire loop body, which can create a stream of repeated calls to the same ISE during program execution; this, in turn, permits the use of hardware pipelining. To address this concern, we introduce a new type of ISE that borrows ideas from zero overhead loop instructions to permit pipelined execution of loops. To further expose instruction level parallelism, the ISE supports loops whose bodies form hyperblocks, which are regions of program control flow that have multiple exits (including loop iterations and break points within loops). These ISEs broaden the scope of instruction level parallelism and obtain higher speed ups compared to traditional ISEs, primarily through pipelining, the exploitation of spatial parallelism, and reducing the overhead of control flow statements and branches.
Keywords :
instruction sets; parallel architectures; parallel processing; pipeline processing; program control structures; control flow inclusion; instruction set extensions; program control flow; program execution; support pipeline; temporal parallelism; Application specific processors; Computer aided instruction; Concurrent computing; Coprocessors; Costs; Design automation; Electronic mail; Hardware; Parallel processing; Pipeline processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Application Specific Processors, 2009. SASP '09. IEEE 7th Symposium on
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4244-4939-2
Electronic_ISBN :
978-1-4244-4938-5
Type :
conf
DOI :
10.1109/SASP.2009.5226328
Filename :
5226328
Link To Document :
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