DocumentCode :
3198037
Title :
A dataflow-centric approach to design low power control paths in CGRAs
Author :
Park, Hyunchul ; Park, Yongjun ; Mahlke, Scott
Author_Institution :
Adv. Comput. Archit. Lab., Univ. of Michigan, Ann Arbor, MI, USA
fYear :
2009
fDate :
27-28 July 2009
Firstpage :
15
Lastpage :
20
Abstract :
Coarse-grained reconfigurable architectures (CGRAs) present an appealing hardware platform by providing high computation throughput, scalability, low cost, and energy efficiency, but suffer from relatively high control path power consumption. We take the concept of a token network from dataflow machines and apply it to the control path of CGRAs to increase efficiency. As a result, instruction memory power is reduced by 74% , the overall control path power by 56%, and the total system power by 25%.
Keywords :
data flow computing; power consumption; reconfigurable architectures; coarse-grained reconfigurable architectures; dataflow centric approach; dataflow machines; instruction memory power; low power control paths; path power consumption; token network; Control systems; Costs; Energy consumption; Energy efficiency; Hardware; Power control; Reconfigurable architectures; Scalability; Throughput; Token networks;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Application Specific Processors, 2009. SASP '09. IEEE 7th Symposium on
Conference_Location :
San Francisco, CA
Print_ISBN :
978-1-4244-4939-2
Electronic_ISBN :
978-1-4244-4938-5
Type :
conf
DOI :
10.1109/SASP.2009.5226330
Filename :
5226330
Link To Document :
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