Simulation of electro-thermal interaction

There is an increasing demand for simulation strategies for electro-thermal analysis of electronic systems. In this study cases are investigated, where self induced thermal dynamics influence the electrical behavior of the device. A method for generation of thermal models is proposed, which requires coarse information on layout while allowing evaluation electro-thermal interactions tentatively. Here, the chip is divided into a number of columns, in which the lateral gradient of the temperature is considered to be negligible. A simple RC-network is used to model the thermal behavior of each layer in the column, which yields a 3D-connected RC-network as a thermal model for the entire chip. This model is generated automatically. The thermal pins of the devices are mapped to the pins of the thermal model, thereby placing the devices roughly on the coarse layout. Now electro-thermal interaction can be investigated using standard simulation tools for electrical network analysis following the first aforementioned strategy.