DocumentCode
3198897
Title
Impedance matching using 3 parasitic elements
Author
Felman, L. ; Sofer, A. ; Matzner, H.
Author_Institution
Dept. of Commun., Holon Inst. of Technol., Holon, Israel
fYear
2009
fDate
9-11 Nov. 2009
Firstpage
1
Lastpage
3
Abstract
A microstrip circuit is matched by using three parasitic elements, where by "parasitic" we mean that there is no physical connection between the matching elements and the main circuit. A 1:2 microstrip divider is used as an example, for which two parasitic elements are located on the output strips of the divider and a single matching element is located on the input strip. The divider was simulated and measured, showing a very good level of matching quality, as well as very good agreement between simulation and measurement.
Keywords
impedance matching; microstrip circuits; impedance matching; microstrip divider; parasitic elements; Bandwidth; Circuit simulation; Impedance matching; Insertion loss; Loss measurement; Microstrip; Narrowband; Optical losses; Transformers; Wideband; impedance matching; parasitic;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwaves, Communications, Antennas and Electronics Systems, 2009. COMCAS 2009. IEEE International Conference on
Conference_Location
Tel Aviv
Print_ISBN
978-1-4244-3985-0
Type
conf
DOI
10.1109/COMCAS.2009.5385986
Filename
5385986
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