Design of Dual-Channel AIS Digital Receiver

Author

Li-Peng Gao ; Jian Liu

Author_Institution

Harbin Eng. Univ., Harbin, China

fYear

2012

fDate

8-10 Dec. 2012

Firstpage

238

Lastpage

242

Abstract

A design of dual-channel digital AIS (Automatic Identification System) receiver based on FPGA is introduced. This innovation of this paper is dividing into two channels by mixer, decimation and filter. The Channelization", "mixer, FIR filter, FM decoder and GMSK decoder digitized will simplify the design of analog circuits and improve the stability and reliability of the equipment. The theoretical and hardware programs of the system are described. The main theories and modules in FPGA are described in detail. The correctness of program is proved by experiment.

Keywords

FIR filters; band-pass filters; decoding; digital radio; field programmable gate arrays; minimum shift keying; mixers (circuits); radio receivers; reliability; FIR filter; FM decoder; FPGA; GMSK decoder; automatic identification system; dual-channel AIS digital receiver; equipment reliability; field programmable gate arrays; mixer; Band pass filters; Field programmable gate arrays; Filtering algorithms; Filtering theory; Finite impulse response filter; Low pass filters; CORDIC; band pass sample; digital filter; digital quadrature mixer; digital receiver;

fLanguage

English

Publisher

ieee

Conference_Titel

Instrumentation, Measurement, Computer, Communication and Control (IMCCC), 2012 Second International Conference on

Conference_Location

Harbin

Print_ISBN

978-1-4673-5034-1

Type

conf

DOI

10.1109/IMCCC.2012.61

Filename

6428894