Semi-Automated Safety Analysis for Field Programmable Gate Arrays

Field Programmable Gate Arrays (FPGAs) are becoming increasingly popular for use in high-integrity safety related and safety critical systems. FPGAs offer a number of potential benefits over traditional microprocessor based software systems, such as predictable timing performance, the ability to perform highly parallel calculations, predictable emulation of obsolete components, and (in the case of SRAM based FPGAs) the ability to reconfigure to avoid hardware failures. However these abilities do not come for free and often designers are forced to make pessimistic safety and reliability assumptions leading to conservative overall system designs. In this paper a modular, and hence more scalable approach, to performing FPGA safety analysis is presented.