DocumentCode :
3199688
Title :
Built-in Current Sensor for Quiescent Current Testing in Analog CMOS Circuits
Author :
Yellampalli, Siva ; Korivi, N.S. ; Marulanda, J.
Author_Institution :
Louisiana State Univ., Baton Rouge
fYear :
2008
fDate :
16-18 March 2008
Firstpage :
329
Lastpage :
333
Abstract :
In this paper we present a new built in current sensor (BICS) for quiescent current testing- IDDQ. This sensor has been designed using forward bias technique to limit the supply voltage degradation caused by quiescent current passing through the BICS to 2% of the supply voltage. A CMOS operational amplifier designed for operation at plusmn 2.5 V in 0.5 mum n-well CMOS process is used as the circuit under test (CUT). The faults simulating possible short and bridging defects are introduced using the fault injection transistors (FIT). A total of twenty short faults have been introduced into the CUT and nineteen of them been detected giving 95% fault coverage.
Keywords :
CMOS analogue integrated circuits; fault simulation; integrated circuit testing; operational amplifiers; CMOS operational amplifier; analog CMOS circuits; built-in current sensor; circuit under test; fault injection transistors; faults simulation; forward bias technique; quiescent current testing; size 0.5 mum; supply voltage degradation; CMOS analog integrated circuits; CMOS process; Circuit faults; Circuit simulation; Circuit testing; Degradation; Electrical fault detection; Fault detection; Operational amplifiers; Voltage; Built-In Current Sensor; Forward Biasing; Low Voltage Degradation; Quiescent Current Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
System Theory, 2008. SSST 2008. 40th Southeastern Symposium on
Conference_Location :
New Orleans, LA
ISSN :
0094-2898
Print_ISBN :
978-1-4244-1806-0
Electronic_ISBN :
0094-2898
Type :
conf
DOI :
10.1109/SSST.2008.4480248
Filename :
4480248
Link To Document :
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