DocumentCode :
3200008
Title :
Keynote Talk #1- EEMBC and the Purposes of Embedded Processor Benchmarking
Author :
Levy, M.
fYear :
2005
fDate :
20-22 March 2005
Firstpage :
1
Lastpage :
1
Abstract :
Summary form only given. Embedded processor benchmarking serves many purposes, from providing a framework to guide architectural choices in the development stage to giving original equipment manufacturers an objective means of predicting processor performance in specific application scenarios. Creating embedded processor benchmarks is a comparatively simple task. More difficult is winning acceptance from the diverse audiences who could be expected to rely on them. The Embedded Microprocessor Consortium (EEMBC), in its seventh year, represents a model that has succeeded relatively well in both tasks. In this presentation, the author describes the structure of EEMBC in its technical and political aspects, review its accomplishments since 1997 in developing various benchmark suites, and discuss the application of various metrics (such as architectural efficiency, power consumption, bus speed, and cache size) beyond raw performance in evaluating the suitability of a given processor for a particular application or system
Keywords :
benchmark testing; computer architecture; embedded systems; microprocessor chips; Embedded Microprocessor Consortium; cache size; computer architecture; embedded processor benchmarking; power consumption; processor performance prediction;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Performance Analysis of Systems and Software, 2005. ISPASS 2005. IEEE International Symposium on
Conference_Location :
Austin, TX
Print_ISBN :
0-7803-8965-4
Type :
conf
DOI :
10.1109/ISPASS.2005.1430553
Filename :
1430553
Link To Document :
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