DocumentCode :
3200171
Title :
Casper: An Asynchronous Progress Model for MPI RMA on Many-Core Architectures
Author :
Min Si ; Pena, Antonio J. ; Hammond, Jeff ; Balaji, Pavan ; Takagi, Masamichi ; Ishikawa, Yutaka
Author_Institution :
Univ. of Tokyo, Tokyo, Japan
fYear :
2015
fDate :
25-29 May 2015
Firstpage :
665
Lastpage :
676
Abstract :
In this paper we present "Casper," a process-based asynchronous progress solution for MPI one-sided communication on multi- and many-core architectures. Casper uses transparent MPI call redirection through PMPI and MPI-3 shared-memory windows to map memory from multiple user processes into the address space of one or more ghost processes, thus allowing for asynchronous progress where needed while allowing native hardware-based communication where available. Unlike traditional thread- and interrupt-based asynchronous progress models, Casper provides the capability to dedicate an arbitrary number of ghost processes for asynchronous progress, thus balancing application requirements with the capabilities of the underlying MPI implementation. We present a detailed design of the proposed architecture including several techniques for maintaining correctness per the MPI-3 standard as well as performance optimizations where possible. We also compare Casper with traditional thread- and interrupt-based asynchronous progress models and demonstrate its performance improvements with a variety of micro benchmarks and a production chemistry application.
Keywords :
application program interfaces; message passing; multiprocessing systems; parallel architectures; shared memory systems; Casper; MPI RMA; MPI one-sided communication; MPI-3 shared-memory windows; PMPI; ghost processes; interrupt-based asynchronous progress models; many-core architectures; multicore architectures; native hardware-based communication; performance optimizations; process-based asynchronous progress solution; production chemistry; remote memory access; thread-based asynchronous progress models; transparent MPI call redirection; Hardware; Load modeling; Memory management; Message systems; Semantics; Standards; MPI ghost process; RMA; asynchronous progress; many-core; multi-core; one-sided communications;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Parallel and Distributed Processing Symposium (IPDPS), 2015 IEEE International
Conference_Location :
Hyderabad
ISSN :
1530-2075
Type :
conf
DOI :
10.1109/IPDPS.2015.35
Filename :
7161554
Link To Document :
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