DocumentCode :
3200415
Title :
A VLSI design for universal Reed-Solomon erasure decoder
Author :
Xu, Youshi ; Zhang, Tingting
Author_Institution :
Dept. of Inf. Technol. & Media, Mid-Sweden Univ., Sundsvall, Sweden
Volume :
1
fYear :
2002
fDate :
26-30 Aug. 2002
Firstpage :
398
Abstract :
We present an encoding and decoding algorithm of universal Reed-Solomon codes for erasure decoding. It is shown that the algorithms can be implemented with simple, regular and modular circuits, naturally suitable for VLSI design. A typical example shows that the signal processing speed is in the order of Gbits/second and the processing delay is less than one millisecond, by the use of the decoders on a single chip. Here "universal" means that the same code and the same circuit design can be used for different code parameters, such as code length and code rate. Therefore, it can be utilized for different applications to recover lost message.
Keywords :
Reed-Solomon codes; VLSI; decoding; delays; integrated circuit design; VLSI design; code length; code parameters; code rate; decoding algorithm; encoding algorithm; erasure decoding; lost message recovery; modular circuits; performance estimation; processing delay; signal processing speed; single chip decoders; universal Reed-Solomon codes; universal Reed-Solomon erasure decoder; Decoding; Discrete Fourier transforms; Encoding; Frequency domain analysis; Information technology; Polynomials; Protection; Reed-Solomon codes; Signal processing algorithms; Very large scale integration;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing, 2002 6th International Conference on
Print_ISBN :
0-7803-7488-6
Type :
conf
DOI :
10.1109/ICOSP.2002.1181074
Filename :
1181074
Link To Document :
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