Title :
Systematic design of RSSI and logarithmic amplifiers circuits
Author :
Melamed, Y. ; Even-Chen, A. ; Spiegel, Solon J.
Author_Institution :
Sch. of Eng., Bar Ilan Univ., Ramat Gan, Israel
Abstract :
This paper presents a systematic design methodology for logarithmic amplifiers and receiver signal strength indicator (RSSI) circuits. A close expression for the maximum detection error using a piece wise linear approximation of the logarithmic function was derived. The design methodology has been proposed that optimizes the power consumption and 3 dB bandwidth of a single stage CMOS limiting amplifier according to the common mode voltages in order to meet the voltage gain and detection error requirements. The results for the RSSI circuit indicate 70 dB dynamic range, 3 dB bandwidth of 500 MHz and maximum detection error of 0.6 dB in the temperature range between -40°C and +70°C. The overall power consumption equals to 10.3 mW in 180 nm CMOS process technology.
Keywords :
CMOS analogue integrated circuits; amplifiers; indicators; integrated circuit design; low-power electronics; network synthesis; CMOS process technology; bandwidth 500 MHz; detection error; logarithmic amplifiers circuits; logarithmic function; piecewise linear approximation; power 10.3 mW; power consumption; receiver signal strength indicator; single stage CMOS limiting amplifier; size 180 nm; systematic design methodology; temperature -40 degC to 70 degC; voltage gain; Bandwidth; Circuits; Design methodology; Design optimization; Dynamic range; Energy consumption; Linear approximation; Power amplifiers; Temperature distribution; Voltage; Logarithmic amplifiers; RSSI; power detectors; signal detection;
Conference_Titel :
Microwaves, Communications, Antennas and Electronics Systems, 2009. COMCAS 2009. IEEE International Conference on
Conference_Location :
Tel Aviv
Print_ISBN :
978-1-4244-3985-0
DOI :
10.1109/COMCAS.2009.5386086
