DocumentCode
3202842
Title
Low-latency scalable switch architecture for ATM/WDM high-speed networks
Author
Ushadevi, M.B. ; Mahesh, H.M. ; Ravikumar, H.M.
Author_Institution
Dept. of TCE, JNN Coll. of Eng., Shimoga
fYear
2007
fDate
25-28 Nov. 2007
Firstpage
462
Lastpage
464
Abstract
A new high capacity switching scheme for ATM/WDM networks is presented. The proposed architecture is contention-free, flexible and highly scalable. Switching performance is studied for data rates of up to 10 Gbit/sec/port, providing aggregated capacity of over 1 Terabit/sec. Simulation results show that low latency is achieved, yielding a powerful solution for high-performance packet-switch networks.
Keywords
asynchronous transfer mode; packet switching; wavelength division multiplexing; ATM high-speed network; WDM high-speed network; low-latency scalable switch architecture; packet-switch networks; Asynchronous transfer mode; Delay; High-speed networks; Optical buffering; Optical packet switching; Optical receivers; Optical switches; Optical transmitters; WDM networks; Wavelength division multiplexing; ATM/WDM Networks; Packet switch Networks; Transmission latency;
fLanguage
English
Publisher
ieee
Conference_Titel
Intelligent and Advanced Systems, 2007. ICIAS 2007. International Conference on
Conference_Location
Kuala Lumpur
Print_ISBN
978-1-4244-1355-3
Electronic_ISBN
978-1-4244-1356-0
Type
conf
DOI
10.1109/ICIAS.2007.4658430
Filename
4658430
Link To Document