DocumentCode
3203757
Title
Non-destructive variability tolerant differential read for non-volatile logic
Author
Das, Jayita ; Alam, Syed M. ; Bhanja, Sanjukta
Author_Institution
Dept. of Electr. Eng., Univ. of South Florida, Tampa, FL, USA
fYear
2012
fDate
5-8 Aug. 2012
Firstpage
178
Lastpage
181
Abstract
In Magnetoresistive RAMs (MRAMs), Magnetic Tunnel Junctions (MTJs) are used to store bits in memory and the bits are read by comparing the MTJ resistance to a reference value. But in non-volatile logic, MTJs are used to store as well as compute by coupling with one another. This results in a `1´ and `0´ lying side by side in logic. Motivated by this inherent property of logic, in this paper we have first developed a differential read for the logic where we have compared a bit with its complement. A differential read provides higher sense margin than any reference reading and eliminates the requirement of reference resistance. Under current technology, the variations in MTJ are sufficient to degrade the sense margin of the circuit to a point when error-free reading becomes a challenge. To make the read more robust, in this paper we have further modified the differential read to design a novel variability tolerant read. Apart from being more immune to MTJ variations, the circuit provides better sense margin than differential read. In this work we have also investigated the factors that influence the sense margin in variability tolerant differential read circuit. Some interesting results from our study include the increased sensitivity of the sense margin to MTJ state `0´ resistance than state `1´ resistance and improvement in variability tolerance with increased Tunnel Magnetoresistance (TMR) of MTJ. The study also includes supportive simulation results.
Keywords
MRAM devices; logic circuits; random-access storage; MRAM; MTJ resistance; TMR; error-free reading; magnetic tunnel junctions; magnetoresistive RAM; nondestructive variability tolerant differential read; nonvolatile logic; reference resistance; sense margin; tunnel magnetoresistance; CMOS integrated circuits; Couplings; Magnetic tunneling; Nonvolatile memory; Resistance; Transistors; Tunneling magnetoresistance; MTJ; differential read; non-destructive; non-volatile logic; variability tolerant;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (MWSCAS), 2012 IEEE 55th International Midwest Symposium on
Conference_Location
Boise, ID
ISSN
1548-3746
Print_ISBN
978-1-4673-2526-4
Electronic_ISBN
1548-3746
Type
conf
DOI
10.1109/MWSCAS.2012.6291986
Filename
6291986
Link To Document