DocumentCode :
3204141
Title :
Limitation of branch predictors: a case for multithreaded architectures
Author :
Golla, Prasad N. ; Lin, Eric C.
Author_Institution :
Dept. of Comput. Sci. & Eng., Southern Methodist Univ., Dallas, TX, USA
fYear :
1998
fDate :
24-26 Apr 1998
Firstpage :
138
Lastpage :
143
Abstract :
Conventional scalar architectures such as the superscalar or multiscalar architectures execute from a single stream, while a multithreaded architecture executes from multiple streams at a time. Several aggressive branch predictors have been proposed with high prediction accuracies but none of them can provide 100% accuracy. We show that multithreaded architecture is a better candidate for utilizing speculative execution than scalar architectures. Generally the branch prediction performance degradation is compounded for larger window sizes on scalar architectures, while for a multithreaded architecture, by increasing the number of executing threads, we could sustain a higher performance for a large aggregated speculative window size. Hence, heavier workloads may increase performance and utilization for multithreaded architectures. We present analytical and simulation results to support our argument
Keywords :
parallel architectures; performance evaluation; branch prediction performance degradation; branch predictors; multithreaded architectures; simulation results; Accuracy; Computer aided manufacturing; Computer aided software engineering; Computer architecture; Computer science; Degradation; History; Space technology; Transistors; Yarn;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Southeastcon '98. Proceedings. IEEE
Conference_Location :
Orlando, FL
Print_ISBN :
0-7803-4391-3
Type :
conf
DOI :
10.1109/SECON.1998.673312
Filename :
673312
Link To Document :
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