• DocumentCode
    3204231
  • Title

    An Exploration of Tiled Architectures for Space Applications

  • Author

    Kogge, Peter M. ; Vance, Megan

  • Author_Institution
    Dept. of Comput. Sci. & Eng., Univ. of Notre Dame, Notre Dame, IN, USA
  • fYear
    2009
  • fDate
    19-23 July 2009
  • Firstpage
    3
  • Lastpage
    12
  • Abstract
    For many reasons, the chip technology for spacecraft computing has lagged commercial systems by decades. Equally disconcerting, however, has been a similar lag in the computer architectures used. This paper will look at an emerging class of multicore processor architectures, called ldquotiled,rdquo extrapolate what they might look like in the future, and how they might be adapted to space applications. This extrapolation will include physical characteristics (speed, power, and area), system architectures, and fault tolerant models.
  • Keywords
    aerospace instrumentation; computer architecture; extrapolation; fault tolerant computing; microprocessor chips; chip fault tolerance; chip system architecture; extrapolation; multicore processor architectures; spacecraft chip technology; spacecraft computing; Application software; Bandwidth; Computer architecture; Information technology; Microprocessors; Random access memory; Redundancy; Scalability; Space missions; Space technology; multi-core; space computing; technology scaling;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Space Mission Challenges for Information Technology, 2009. SMC-IT 2009. Third IEEE International Conference on
  • Conference_Location
    Pasadena, CA
  • Print_ISBN
    978-0-7695-3637-8
  • Type

    conf

  • DOI
    10.1109/SMC-IT.2009.10
  • Filename
    5226854