• DocumentCode
    3204249
  • Title

    Space-optimal linear processor allocation for systolic arrays synthesis

  • Author

    Wong, Yiwan ; Delosme, Jean-Marc

  • Author_Institution
    Integrated Syst. Lab., Texas Instruments Inc., Dallas, TX, USA
  • fYear
    1992
  • fDate
    23-26 Mar 1992
  • Firstpage
    275
  • Lastpage
    282
  • Abstract
    The mapping of a systolic algorithm onto a regularly connected array architecture can be considered as a linear transformation problem. However, to derive the `optimal´ transformation is difficult because the necessary optimizations involve discrete decision variables and the cost functions do not usually have closed-form expressions. The paper considers the derivation of a space-optimal (minimum processor count) mapping of a given time performance. Utilizing some recent results from the geometry of numbers, it is shown that the solution space for this discrete optimization problem can be nicely bounded and hence, the optimal solution can be efficiently determined with enumeration for practical cases. Examples are provided to demonstrate the effectiveness of this approach
  • Keywords
    circuit layout CAD; parallel algorithms; systolic arrays; discrete optimization; linear processor allocation; linear transformation; regularly connected array architecture; systolic algorithm; systolic arrays synthesis; Closed-form solution; Computer architecture; Cost function; Geometry; Instruments; Laboratories; Partitioning algorithms; Processor scheduling; Scheduling algorithm; Systolic arrays;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Parallel Processing Symposium, 1992. Proceedings., Sixth International
  • Conference_Location
    Beverly Hills, CA
  • Print_ISBN
    0-8186-2672-0
  • Type

    conf

  • DOI
    10.1109/IPPS.1992.223033
  • Filename
    223033