DocumentCode :
3204999
Title :
SET characterization and mitigation in RTAX-S antifuse FPGAs
Author :
Rezgui, Sana ; Wang, J.J. ; Sun, Yinming ; Silva, Durwyn D. ; Cronquist, Brian ; McCollum, John
Author_Institution :
Actel Corp., Mountain View, CA
fYear :
2009
fDate :
7-14 March 2009
Firstpage :
1
Lastpage :
14
Abstract :
Heavy-ion test results utilizing novel test methodologies of non-volatile antifuse-based FPGAs are presented and discussed. In particular, the programmable architectures in the RTAX-S FPGA-family including the I/O structures, and the FPGA core were tested and their cross-sections measured. Previously available SET mitigation solution based on SET filtering was implemented on the RTAX-S test designs and their efficacy proven to reduce the saturation cross-section and increase the LET threshold of the mitigated test designs.
Keywords :
field programmable gate arrays; I-O structures; RTAX-S antifuse FPGA; RTAX-S test designs; SET filtering; SET mitigation solution; heavy-ion test; nonvolatile antifuse-based FPGA; saturation cross-section; single event transient; Clocks; Field programmable gate arrays; Frequency; Logic; Performance evaluation; Pulse measurements; Single event upset; Space vector pulse width modulation; Sun; Testing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Aerospace conference, 2009 IEEE
Conference_Location :
Big Sky, MT
Print_ISBN :
978-1-4244-2621-8
Electronic_ISBN :
978-1-4244-2622-5
Type :
conf
DOI :
10.1109/AERO.2009.4839515
Filename :
4839515
Link To Document :
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