• DocumentCode
    3205632
  • Title

    Impact of technology on low-voltage CMOS and BiCMOS switching delay

  • Author

    Davis, Kelly L. ; Yuan, J.S.

  • Author_Institution
    Univ. of Central Florida, Orlando, FL, USA
  • fYear
    1998
  • fDate
    24-26 Apr 1998
  • Firstpage
    170
  • Lastpage
    173
  • Abstract
    An alternative switching delay reduction technique for CMOS and BiCMOS digital circuits is examined. A simplified BSIM3V2 model equation is used to analyze CMOS inverter delay for different VDD, T ox, and VT. PSPICE BiCMOS delay results are presented over a wide range of VDD, Tox, and VT
  • Keywords
    BiCMOS digital integrated circuits; CMOS digital integrated circuits; delays; integrated circuit design; switching; BSIM3V2 model equation; CMOS inverter delay analysis; PSPICE BiCMOS delay results; digital circuits; low-voltage BiCMOS; low-voltage CMOS; switching delay reduction technique; technology impact; BiCMOS integrated circuits; CMOS digital integrated circuits; CMOS technology; Delay; Differential equations; Digital circuits; Inverters; SPICE; Semiconductor device modeling; Switching circuits;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Southeastcon '98. Proceedings. IEEE
  • Conference_Location
    Orlando, FL
  • Print_ISBN
    0-7803-4391-3
  • Type

    conf

  • DOI
    10.1109/SECON.1998.673319
  • Filename
    673319
    • Link To Document
    https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=3205632