DocumentCode
3205770
Title
Non-idealities in analog circuits design: What does it really mean?
Author
Guerrero-Linares, L. ; Sandoval-Ibarra, F. ; Loo-Yau, J.R.
Author_Institution
Centro de Ensenanza Tec. Ind., Guadalajara, Mexico
fYear
2012
fDate
5-8 Aug. 2012
Firstpage
586
Lastpage
589
Abstract
The aim of this contribution is to show why sources of non-idealities are actually a concept of reason in order to define tradeoffs in the design of analog circuits. A tradeoff is commonly picked up from an analytical design-model, which tries to explain a given phenomenon under study by using physical theories underlying the role of non-idealities in the design of accurate analog-circuits. Since accuracy is commonly used as a measure rule for minimizing the unwanted effect of non-idealities on the circuit performance, this paper underlines that non-idealities reported in open literature shown that any analog circuit is designed in a custom way, in which just some non-idealities are minimized in order to fulfill specific design specifications, i.e. sources of non-idealities do not necessarily include all existing ones but just those affecting -according the experience of the designer - the circuit´s performance. Thus, what non-idealities have to be minimized in an analog circuit design is a question usually answered by reachable tradeoffs. This paper addresses difficulties (i.e. open problems) about silicon-based analog circuit design. So, analog design is not art, but an engineering activity supported in physical theories. Analog design demands not only accurate design models, and suitable simulation tools, but also a well-defined design methodology, elsewhere trial-and-error practices force to the analog-circuit designer to include substantial design margin and risk yield loss, and also provide little design knowledge.
Keywords
analogue circuits; integrated circuit design; accurate design models; analog circuits design; analytical design-model; circuit performance; design specifications; engineering activity; nonidealities; physical theories; silicon-based analog circuit design; simulation tools; trial-and-error practices; well-defined design methodology; Accuracy; Analog circuits; CMOS integrated circuits; Integrated circuit modeling; Layout; Solid modeling; Transistors;
fLanguage
English
Publisher
ieee
Conference_Titel
Circuits and Systems (MWSCAS), 2012 IEEE 55th International Midwest Symposium on
Conference_Location
Boise, ID
ISSN
1548-3746
Print_ISBN
978-1-4673-2526-4
Electronic_ISBN
1548-3746
Type
conf
DOI
10.1109/MWSCAS.2012.6292088
Filename
6292088
Link To Document