DocumentCode
3206884
Title
Practical DPA attacks on MDPL
Author
De Mulder, Elke ; Gierlichs, Benedikt ; Preneel, Bart ; Verbauwhede, Ingrid
Author_Institution
ESAT/SCD-COSIC, K.U. Leuven, Leuven, Belgium
fYear
2009
fDate
6-9 Dec. 2009
Firstpage
191
Lastpage
195
Abstract
There exist only two articles that present clear results of practical DPA attacks against an MDPL prototype chip and both are essentially in favour of its security. Unsuccessful attacks are however only weak evidence of security, and at present it is unclear to what extent some proposed theoretical concepts affect the security provided by MDPL in practice. We fill this gap and present results of an extensive case study of attacks against an MDPL prototype chip. In contrast with other practical works, we demonstrate successful DPA attacks and show that MDPL implementations, resistant to standard DPA attacks, can be broken in practice. Further, we show that the underlying concept of the folding attack, i.e. analysis of probability densities, indeed exposes MDPL´s greatest weakness: the masking renders the circuit more vulnerable to attacks than a circuit with a fixed mask. In addition, our analysis leads to novel insights into the power consumption properties of MDPL in real silicon.
Keywords
cryptography; differential power analysis attacks; folding attack; masked dual-rail precharge logic prototype chip; power consumption properties; probability densities; Circuits; Cryptography; Data mining; Energy consumption; Information retrieval; Logic gates; Protection; Prototypes; Security; Silicon; CRY-CRYP; SYS-HARD;
fLanguage
English
Publisher
ieee
Conference_Titel
Information Forensics and Security, 2009. WIFS 2009. First IEEE International Workshop on
Conference_Location
London
Print_ISBN
978-1-4244-5279-8
Electronic_ISBN
978-1-4244-5280-4
Type
conf
DOI
10.1109/WIFS.2009.5386455
Filename
5386455
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