Title :
Reducing the cost of circular built-in self-test by selective flip-flop replacement
Author :
Sullivan, Malissa G. ; Stroud, Charles E.
Author_Institution :
DataBeam Corp., Lexington, KY, USA
Abstract :
The cost of self-testing and diagnosing VLSI circuits which use Circular Built-In Self-Test (BIST) is reduced through the selective replacement of existing flip-flops with Circular BIST flip-flops. We find that maximal fault coverage can be maintained while only replacing approximately 60% of the existing flip-flops in the VLSI circuit as opposed to the 80% to 100% replacement performed in most applications. On the other hand, we find that the optimal fault coverage vs. area overhead is obtained with approximately 30% replacement.
Keywords :
VLSI; application specific integrated circuits; automatic testing; built-in self test; circuit analysis computing; fault diagnosis; flip-flops; integrated circuit testing; logic testing; sequential circuits; ATPG; VLSI circuits; area overhead; board level testing; circular built-in self-test; cost reduction; device level testing; maximal fault coverage; optimal fault coverage; selective flip-flop replacement; sequential logic; Built-in self-test; Circuit faults; Circuit testing; Costs; Flip-flops; Hardware; Silicon; Software testing; System testing; Very large scale integration;
Conference_Titel :
AUTOTESTCON '95. Systems Readiness: Test Technology for the 21st Century. Conference Record
Conference_Location :
Atlanta, GA, USA
Print_ISBN :
0-7803-2621-0
DOI :
10.1109/AUTEST.1995.522714
