DocumentCode :
320807
Title :
Self-adjusting output data compression: An efficient BIST technique for RAMs
Author :
Yarmolik, V.N. ; Hellebrand, S. ; Wunderlich, H.-J.
Author_Institution :
Dept. of Comput. Syst., Belarussian State Univ. of Inf. & Radioelectron., Minsk, Byelorussia
fYear :
1998
fDate :
23-26 Feb 1998
Firstpage :
173
Lastpage :
179
Abstract :
After write operations, BIST schemes for RAMs relying on signature analysis must compress the entire memory contents to update the reference signature. This paper introduces a new scheme for output data compression which avoids this overhead while retaining the benefits of signature analysis. The proposed technique is based on a new memory characteristic derived as the module-2 sum of all addresses pointing to non-zero cells. This characteristic can be adjusted concurrently with write operations by simple EXOR-operations on the initial characteristic and on the addresses affected by the change
Keywords :
built-in self test; data compression; integrated circuit testing; random-access storage; BIST; EXOR operation; RAM; memory characteristic; self-adjusting output data compression; signature analysis; Automatic testing; Built-in self-test; Circuit testing; Computer architecture; Data compression; Informatics; Production; Random access memory; Read-write memory; Test pattern generators;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe, 1998., Proceedings
Conference_Location :
Paris
Print_ISBN :
0-8186-8359-7
Type :
conf
DOI :
10.1109/DATE.1998.655853
Filename :
655853
Link To Document :
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