DocumentCode :
320829
Title :
On removing multiple redundancies in combinational circuits
Author :
Chang, Shih-Chieh ; Cheng, David Ihsin ; Yeh, Ching-Wei
Author_Institution :
Nat. Chung Cheng Univ., Chia-Yi, Taiwan
fYear :
1998
fDate :
23-26 Feb 1998
Firstpage :
738
Lastpage :
742
Abstract :
Redundancy removal is an important step in combinational logic optimization. After a redundant wire is removed, other originally redundant wires may become irredundant, and some originally irredundant wires may become redundant. When multiple redundancies exist in a circuit, this creates a problem where we need to decide which redundancy to remove first. In this paper, we present an analysis and a very efficient heuristic to deal with multiple redundancies. We associate with each redundant wire a Boolean function that describes how the wire can remain redundant after removing other wires. When multiple redundancies exist, this set of Boolean functions characterizes the global relationship among redundancies
Keywords :
Boolean functions; circuit optimisation; combinational circuits; logic CAD; redundancy; wiring; Boolean function; combinational circuits; global relationship; heuristic; irredundant wires; logic optimization; multiple redundancies; redundant wire; Boolean functions; Circuit faults; Combinational circuits; Contracts; Councils; Logic; Redundancy; Wire;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design, Automation and Test in Europe, 1998., Proceedings
Conference_Location :
Paris
Print_ISBN :
0-8186-8359-7
Type :
conf
DOI :
10.1109/DATE.1998.655940
Filename :
655940
Link To Document :
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