Towards the implementation of a cryogenic D/A converter for silicon quantum computer controller

A cryogenic CMOS D/A converter, core part of a Silicon quantum computer controller, produces voltage signals to generate electric fields for Silicon quantum bits initialization. In low temperature, the converter has to overcome several constraints before it is ready to work. These include CMOS operating region choice, anomalies of CMOS behavior, component mismatch degradation, technology choice and above all fulfilling the application requirements in cryogenic domain. In this paper, we explore these background requirements and critical issues that lead us to design a self calibrated ±1.5V 10 bit cryogenic D/A converter in 0.5μm CMOS Silicon-on-Sapphire process and briefly explain its architecture and design challenges. The differential nonlinearity (DNL) and integral nonlinearity (INL) of this converter are ±0.25 and ±0.4 least significant bit (LSB) respectively while its average power dissipation is 25mW and it occupies 1.2mm² die area.