Integrating testability analysis tools with automatic test systems (ATS)

The thrust of the project described is to integrate outputs of the System Testability Analysis Tool with a board level tester to achieve an optimal GO-NO GO test strategy and fault diagnostics to minimal component identification. The System Testability Analysis Tool (STAT) provides information on testability characteristics of a design. It can also be used to develop optimal fault isolation test strategies in the form of diagnostic flow tables. These tables provide an optimal test performance order to achieve fault-isolation based on topological design characteristics and one or more weighting criteria (e.g., reliability, test cost/time, component replacement cost/time). In an effort to take advantage of the test strategy outputs of testability analysis tools, an attempt is made to develop the means to control test execution order on a board-level Automatic Test System (ATS) based on the test order produced by STAT. This paper will discuss the objectives of this program, and present details on the results. Currently, a test program set (TPS) exists for an analog card that is being tested on a Sigma Series board-level test station. Software has been developed that will take a STAT diagnostic output report and develop a test program database. This database has been integrated with a TPS wherein a test technician is automatically directed through probing sequences for fault-isolation. The database can also be used in an interactive maintenance aid format or as a test executive when probing is not required for fault isolation. Fault-isolation call-outs are also provided by the STAT, and this information is available during test. Details of the project progress, and any lesson´s learned will be provided.