Resistance extraction using superconvergence accelerated boundary element method

Author

Sun, Weikai ; Hong, Wei ; Dai, Wayne Wei-Ming

Author_Institution

Ultima Interconnect Tech. Inc., Sunnyvale, CA, USA

Volume

3

fYear

1997

fDate

2-5 Dec 1997

Firstpage

1061

Abstract

Accurate and efficient extraction of parasitic resistance is becoming more important to achieve high-speed high-performance digital systems. In this paper, we propose a superconvergence accelerated boundary element method (SA-BEM) to calculate parasitic resistances. Experimental results show that the SA-BEM can achieve up to two orders of magnitude speed improvement over the traditional BEM and/or Method of Moment (MoM) approach. In addition, the whole resistance matrix can be obtained at one time

Keywords

boundary-elements methods; circuit layout; convergence of numerical methods; electric resistance; integrated circuit interconnections; integrated circuit modelling; integrated circuit packaging; method of moments; IC interconnections; IC packages; circuit layout; high-speed high-performance digital system; method of moments; parasitic resistance extraction; resistance matrix; superconvergence accelerated boundary element method; Acceleration; Boundary element methods; Conformal mapping; Geometry; Integral equations; Integrated circuit interconnections; Message-oriented middleware; Packaging; Sparse matrices; Wires;

fLanguage

English

Publisher

ieee

Conference_Titel

Microwave Conference Proceedings, 1997. APMC '97, 1997 Asia-Pacific

Print_ISBN

962-442-117-X

Type

conf

DOI

10.1109/APMC.1997.656399

Filename

656399