A unified systolic array algorithm for discrete inverse cosine and sine transforms

Author

Chiper, Doru-Florin

Author_Institution

Dept. of Appl. Electron., Tech. Univ., Iasi, Romania

Volume

3

fYear

1999

fDate

1999

Firstpage

1198

Abstract

This paper presents a new design approach for the inverse discrete sine and cosine transforms based on a new unified systolic array algorithm that can be used to obtain VLSI array architectures with very small differences in the hardware structure for the two transforms and improved performances. This new algorithm is based on using highly regular and modular computational structures as circular correlation and can be mapped into linear systolic arrays with a small number of I/O channels and low I/O bandwidth

Keywords

VLSI; discrete cosine transforms; signal processing; systolic arrays; I/O channels; VLSI array architectures; circular correlation; discrete inverse cosine transforms; discrete inverse sine transforms; hardware structure; linear systolic arrays; low I/O bandwidth; modular computational structures; unified systolic array algorithm; Concurrent computing; Data flow computing; Discrete cosine transforms; Discrete transforms; Distributed computing; Embedded computing; Hardware; Signal processing algorithms; Systolic arrays; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Industrial Electronics, 1999. ISIE '99. Proceedings of the IEEE International Symposium on

Conference_Location

Bled

Print_ISBN

0-7803-5662-4

Type

conf

DOI

10.1109/ISIE.1999.796868

Filename

796868