High Performance and Parallel Model for LU Decomposition on FPGAs

The matrix LU decomposition is the key kernel of the Linpack benchmark. Based on the analysis of the theory Gaussian elimination, this paper proposes a parallel model of implementing the LU decomposition on FPGAs. The model has the pivoting operation and different architecture with former designs. Experimental results show the floating-point performance of our designs achieves 3371.40 MFLOPS at 110 MHz clock frequency, which is 4 times greater than the microprocessor while operating at a clock frequency that is 27 times lower.