A WSI hypercube design using shift channels

A novel design of a hypercube network (HC) on WSI (wafer scale integration) is proposed. the design makes both static and dynamic reconfigurations feasible. A WSI HC design by applying the Diogenes method to a planar structure has been proposed. However, in Diogenes method, every time a wire passes a processing element (PE), it passes at least one FET. Therefore, the design has a drawback that there are many FETs in a link between PEs and then it brings a large communication delay time. The design proposed here reduces the number of FETs in a link between PEs by utilizing two channels, called shift channel and basic channel for reconfiguration. The design can be accomplished by using a structure in which FETs are contained only in shift channels but not in basic channels. The channel is a bundle of wires which has a track width sufficient to make sub-HCs. A switch in the shift channel is similar to the switch of Diogenes method, but it is newly designed as a dedicated one