DocumentCode
3211208
Title
Proceedings 1992 IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems (Cat. No.92TH0481-2)
fYear
1992
fDate
4-6 Nov. 1992
Abstract
The following topics are dealt with: defect and yield modeling; fault tolerant arrays; testing; concurrent error detection; system fault diagnosis; defect and fault modeling; fault tolerant systems; defect tolerance; fault tolerant arithmetics; system testing and routing for defect tolerance
Keywords
VLSI; digital arithmetic; error detection; fault location; fault tolerant computing; system recovery; concurrent error detection; defect modeling; defect tolerance; fault modeling; fault tolerant arithmetics; fault tolerant arrays; fault tolerant systems; routing; system fault diagnosis; system testing; yield modeling;
fLanguage
English
Publisher
ieee
Conference_Titel
Defect and Fault Tolerance in VLSI Systems, 1992. Proceedings., 1992 IEEE International Workshop on
Conference_Location
Dallas, TX, USA
ISSN
1550-5774
Print_ISBN
0-8186-2837-5
Type
conf
DOI
10.1109/DFTVS.1992.224398
Filename
224398
Link To Document