Title :
Speed Enhancement and Linearity Analysis for a Rail-to-Rail Input Opamp in 120nm CMOS
Author :
Yan, W.X. ; Zimmermann, H.
Author_Institution :
Vienna Univ. of Technol., Vienna
Abstract :
This paper introduces a fully differential opamp with constant large-and small-signal behavior rail-to-rail input stage. A compensation strategy is presented to extend the bandwidth. The linearity issue of the compensation is discussed. A test chip is implemented in a standard 120 nm CMOS process, with the measured signal variation of about 4.43% as well as a GBW of 135 MHz. Experimental results verify the performance.
Keywords :
CMOS analogue integrated circuits; compensation; differential amplifiers; integrated circuit testing; operational amplifiers; CMOS analog integrated circuits; CMOS process; compensation strategy; differential opamp; frequency 135 MHz; linearity analysis; rail-to-rail input opamp; size 120 nm; speed enhancement; Bandwidth; CMOS analog integrated circuits; CMOS technology; Character generation; Circuit testing; Linearity; Measurement standards; Rail to rail inputs; Transconductance; Voltage; CMOS Analog integrated circuits; Constant Transconductance; Fully Differential; Opamp; Rail-to-rail Input;
Conference_Titel :
Mixed Design of Integrated Circuits and Systems, 2007. MIXDES '07. 14th International Conference on
Conference_Location :
Ciechocinek
Print_ISBN :
83-922632-9-4
Electronic_ISBN :
83-922632-9-4
DOI :
10.1109/MIXDES.2007.4286181
