Power system restoration using reverse delete algorithm implemented in FPGA

A graph theory based algorithm called as reverse delete algorithm to find the optimal path of power flow for a given network is proposed in this paper. Whenever an outage occurs in the distribution network, the power has to be restored to the isolated area by altering the path of power flow, which is achieved by altering the switching positions of the network. The reverse delete algorithm helps in finding the path of least impedance called minimum spanning tree to supply the power to the isolated areas. Backward sweeper based load flow technique is applied to this resultant minimum spanning tree. Based on the results (voltage, current and power flow) obtained from the load flow solutions, other constraints of the restoration problem are applied. The results are tabulated for 33 bus single feeder distribution network and for 16 bus multi feeder distribution network. The hardware implementation of this algorithm is done using Verilog HDL.