• DocumentCode
    3211804
  • Title

    A PMOSFET ESD failure caused by localized charge injection

  • Author

    Chun, Lung-Hoon ; Duvvury, Charvaka ; Boselli, Gianluca ; Kunz, Hans ; Dutton, Robert W.

  • Author_Institution
    Center for Integrated Syst., Stanford Univ., CA, USA
  • fYear
    2004
  • fDate
    25-29 April 2004
  • Firstpage
    405
  • Lastpage
    411
  • Abstract
    A new failure mechanism of PMOSFET devices under ESD conditions is reported and analyzed by investigating various I/O structures. Localized turn-on of the parasitic pnp transistor can be caused by localized charge injection into the body of the PMOSFET. Critical layout parameters affecting this problem are discussed based on 2-D device simulations. A general strategy for avoiding this failure mode is also suggested.
  • Keywords
    MOSFET; charge injection; electrostatic discharge; failure analysis; semiconductor device breakdown; semiconductor device reliability; I/O structures; PMOSFET ESD failure; critical layout parameters; failure mechanism; localized charge injection; localized turn-on; parasitic pnp transistor; CMOS technology; Circuit testing; Clamps; Electrostatic discharge; Failure analysis; MOS devices; MOSFET circuits; Protection; Rails; Stress;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reliability Physics Symposium Proceedings, 2004. 42nd Annual. 2004 IEEE International
  • Print_ISBN
    0-7803-8315-X
  • Type

    conf

  • DOI
    10.1109/RELPHY.2004.1315360
  • Filename
    1315360