Title :
A complement-based fast algorithm to generate universal test sets for combinational function blocks
Author :
Chen, Beyin ; Lee, Chung Len
Author_Institution :
Dept. of Electron. Eng., Nat. Chiao Tung Univ., Hsin-Chu, Taiwan
Abstract :
A fast algorithm to generate the universal test sets (UTS) for combinational function blocks is presented. The algorithm generates the UTS directly by Shannon-expanding and complementing the function, instead of the conventional truth table enumerating. This significantly reduces the time complexity and the memory requirements. Experimental results show that this algorithm achieves an improvement of 2~6 orders of magnitude in computational efficiency over that described by B. Sheldon and J.R. Akers (1973). This makes the UTS generation be practical for combinational function blocks
Keywords :
automatic test equipment; automatic testing; combinatorial circuits; logic design; logic testing; ATE; Shannon expansion; combinational function blocks; computational efficiency; test algorithm; time complexity; truth table; universal test sets; Automatic test pattern generation; Circuit faults; Circuit testing; Combinational circuits; Computational efficiency; Electronic equipment testing; Input variables; Integrated circuit testing; Logic functions; Logic testing;
Conference_Titel :
Test Symposium, 1992. (ATS '92), Proceedings., First Asian (Cat. No.TH0458-0)
Conference_Location :
Hiroshima
Print_ISBN :
0-8186-2985-1
DOI :
10.1109/ATS.1992.224439
