Defect tolerant ganged CMOS minority gate

Production defects, resulting in faulty transistors, provide a challenge for the semiconductor industry in terms of reduced Yield. As defect densities are expected to increase as the semi-conductor feature size decreases, some form of transistor level defect tolerance is desirable to reduce this increasing production challenge. This paper proposes a solution, based on the ganged CMOS minority gate, for transistor level defect tolerance for minority gates.