Title :
Local improvement in Steiner trees
Author :
Lewis, F.D. ; Pong, Wang Chia-Chi ; Van Cleave, N.
Author_Institution :
Dept. of Comput. Sci., Kentucky Univ., Lexington, KY, USA
Abstract :
An approach to the construction of rectilinear Steiner spanning trees that takes advantage of an elegant new representation to simply apply local improvement methods to the problem is presented. Use of a special type of Steiner tree allows the results to contain a minimum number of vias while achieving a significant reduction in wire length over previous methods
Keywords :
circuit layout; computational complexity; network topology; trees (mathematics); NP-complete problem; VLSI layouts; local improvement methods; rectilinear Steiner spanning trees; vias; wire length reduction; Computer science; Educational institutions; Heuristic algorithms; NP-complete problem; Steiner trees; TV; Wire;
Conference_Titel :
VLSI, 1993. 'Design Automation of High Performance VLSI Systems', Proceedings., Third Great Lakes Symposium on
Conference_Location :
Kalamazoo, MI
Print_ISBN :
0-8186-3430-8
DOI :
10.1109/GLSV.1993.224470
