Title :
Asynchronous design of networks-on-chip
Author_Institution :
Tech. Univ. of Denmark Richard Petersens Plads, Lyngby
Abstract :
The Network-on-chip concept has evolved as a solution to a broad range of problems related to the design of complex systems-on-chip (SoC) with tenths or hundreds of (heterogeneous) IP-cores. The paper introduces the NoC concept, identifies a range of possible timing organizations (globally-synchronous, mesochronous, globally-asynchronous locally-synchronous and fully asynchronous), discusses the circuitry needed to implement these timing methodologies, and provides some implementation details for a couple of asynchronous NoCs designed at the Technical University of Denmark (DTU). The paper is written to support an invited talk at the NORCHIP´2007 conference.
Keywords :
network synthesis; network-on-chip; SoC; asynchronous NoC designed; complex systems-on-chip; network-on-chip concept; timing methodologies; Asynchronous circuits; Clocks; Coupling circuits; Network topology; Network-on-a-chip; Packet switching; Routing; Switches; Synchronization; Timing;
Conference_Titel :
Norchip, 2007
Conference_Location :
Aalborg
Print_ISBN :
978-1-4244-1516-8
Electronic_ISBN :
978-1-4244-1517-5
DOI :
10.1109/NORCHP.2007.4481080
