Void and extrusion induced failure of submicron multilevel interconnects

Author

Jo, Yong-Bum ; Park, Jongwoo ; Jeon, Chul-Hee ; Ouh, Kyung-Il ; Jeon, Hyun-Goo

Author_Institution

SYSTEM LSI, Samsung Electron., Gyeonggi-Do, South Korea

fYear

2004

fDate

25-29 April 2004

Firstpage

629

Lastpage

630

Abstract

Failure mechanism of the submicron multilevel interconnects contained in quad flat package (QFP) subjected to the high temperature operating life. (HTOL) test conditions under temperature and bias was investigated. Apparently, TEM-EDX (X-ray dispersive) reveals that the extrusion of Al metallization appears on the ground and voltage imposed metal line. Such phenomena which may need to be taken into account include stresses induced by the given stress test conditions correlated to the layout of electronic circuit. For the verification purpose, a new layout is committed and subjected to the HTOL.

Keywords

X-ray chemical analysis; aluminium; electric breakdown; integrated circuit interconnections; integrated circuit reliability; integrated circuit testing; transmission electron microscopy; voids (solid); Al; Al metallization; TEM-EDX; extrusion induced failure; failure mechanism; ground imposed metal line; high temperature operating life. test conditions; layout; quad flat package; submicron multilevel interconnects; void induced failure; voltage imposed metal line; Circuit testing; Dispersion; Electronics packaging; Failure analysis; Integrated circuit interconnections; Land surface temperature; Life testing; Metallization; Stress; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Reliability Physics Symposium Proceedings, 2004. 42nd Annual. 2004 IEEE International

Print_ISBN

0-7803-8315-X

Type

conf

DOI

10.1109/RELPHY.2004.1315423

Filename

1315423