DocumentCode
3213279
Title
Vector memory expansion system for T33XX logic tester
Author
Yamada, Kazuhiro ; Takahashi, Yoshikazu
Author_Institution
Semicond. Test Eng., IBM Japan Ltd., Shiga, Japan
fYear
2002
fDate
18-20 Nov. 2002
Firstpage
392
Lastpage
396
Abstract
This paper describes a low-cost memory expansion system for the Advantest T33XX logic tester series. Using this system, the T33XX tester has the same capability as the T6672 tester. This system allows the T33XX to be used for ASIC wafer testing until 2010.
Keywords
VLSI; application specific integrated circuits; automatic test equipment; integrated circuit testing; integrated logic circuits; large scale integration; logic testing; memory expansion boards; ASIC wafer testing; Advantest T33XX logic tester series; logic LSI chips; low-cost memory expansion system; vector memory expansion system; Clocks; Computer buffers; Large scale integration; Logic testing; Pins; Semiconductor device testing; Sequential analysis; System testing; Test pattern generators; Timing;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Symposium, 2002. (ATS '02). Proceedings of the 11th Asian
ISSN
1081-7735
Print_ISBN
0-7695-1825-7
Type
conf
DOI
10.1109/ATS.2002.1181743
Filename
1181743
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