DocumentCode :
3213364
Title :
Modeling and verification of single event transients in deep submicron technologies
Author :
Gadlage, Matthew J. ; Schrimpf, Ronald D. ; Benedetto, Joseph M. ; Eaton, Paul K. ; Turflinger, T.L.
Author_Institution :
NAVSEA Crane, Vanderbilt Univ., Crane, IN, USA
fYear :
2004
fDate :
25-29 April 2004
Firstpage :
673
Lastpage :
674
Abstract :
Digital single event transients (DSETs) are becoming an increasing concern for deep submicron ICs. As device feature sizes shrink, digital circuits become faster, have smaller parasitics, and become more susceptible to single event effects (SEEs). If an ionizing particle creates enough charge to be collected on a node within a combinatorial gate, a transient pulse will be formed that may propagate through the circuit and be latched in as bad data. In order to predict the response of a circuit to a single event, people have long used circuit and device level simulations. In this paper, we show that when dealing with deep submicron technologies, knowing the pulse structure of the transient is crucial to predicting its propagation distance accurately.
Keywords :
CMOS integrated circuits; SPICE; integrated circuit modelling; integrated circuit reliability; radiation hardening (electronics); deep submicron technologies; device feature sizes; digital circuits; ionizing particle; propagation distance; single event effects; single event transients; smaller parasitics; Circuit simulation; Circuit testing; Cranes; Discrete event simulation; Photoconductivity; Predictive models; Pulse circuits; Pulse inverters; SPICE; Shift registers;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Reliability Physics Symposium Proceedings, 2004. 42nd Annual. 2004 IEEE International
Print_ISBN :
0-7803-8315-X
Type :
conf
DOI :
10.1109/RELPHY.2004.1315445
Filename :
1315445
Link To Document :
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