Three-dimensional TCAD Process and Device Simulations

Author

Avci, I. ; Balasingam, P. ; El Sayed, K. ; Gharib, J. ; Johnson, M.D. ; Kells, K. ; Kiralyfalvi, G. ; Koltyzhenkov, V. ; Kucherov, A. ; Lyumkis, E. ; Penzin, O. ; Polsky, B. ; Rao, V. ; Simeonov, S.D. ; Strecker, N. ; Tan, Z. ; Villablanca, L. ; Fichtner,

Author_Institution

Synopsys Inc., Mountain View

fYear

2006

fDate

25-28 June 2006

Firstpage

41

Lastpage

46

Abstract

Shrinking feature sizes, novel device designs as well as stress engineering increase the need for three- dimensional process and device simulations. We present several application examples for full 3D process and device simulations using Sentaurus TCAD, including a 3D NMOSFET with shallow trench isolations (STI), a PMOSFET device with SiGe pockets for stress engineering (similar to the structure presented in Ref. [1]) and a Omega-FinFET (similar to structures presented in Refs. [2,3]). TCAD simulations of the full process flow as well as of the electrical device characteristics are performed. We also show examples of 3D oxidation simulations with Sentaurus Process.

Keywords

MOSFET; semiconductor technology; technology CAD (electronics); 3D NMOSFET; 3D oxidation simulations; PMOSFET; Sentaurus TCAD; Sentaurus process; device simulations; electrical device characteristics; shallow trench isolations; shrinking feature sizes; stress engineering; three-dimensional TCAD process; Annealing; Boron; Etching; Implants; MOSFET circuits; Material properties; Robustness; Shadow mapping; Stress; Tellurium;

fLanguage

English

Publisher

ieee

Conference_Titel

University/Government/Industry Microelectronics Symposium, 2006 16th Biennial

Conference_Location

San Jose, CA

ISSN

0749-6877

Print_ISBN

1-4244-0267-0

Type

conf

DOI

10.1109/UGIM.2006.4286350

Filename

4286350