FPGA hardware results for power system computation

This paper presents preliminary computational results based on an alternative computing platform comprising a host computer interconnected to a field programmable gate array (FPGA). These results represent load flow calculations performed on realistically sized power systems. The motivation behind this work lies in the influence of computational time reduction on reliable power system operation. operators work with a variety of power system analytical packages aimed at ensuring real-time processing of data being transmitted from the SCADA system via network and telemetry. Results presented in this paper are compared to performance measures obtained from modeling these processes on benchmark power grids. Observations further justify that algorithm-specific hardware can provide in certain cases up to an order of magnitude speedup over the software program of the same algorithm running on Pentium-based PCs.