• DocumentCode
    321475
  • Title

    Reliable PN chip clock generation for CDMA code acquisition and tracking

  • Author

    Oh, Hyun-Seo ; Kim, Hyun-chul ; Kang, Chang-Eon ; Son, Jung-Young

  • Author_Institution
    Signal Process. Sect., ETRI, Taejon, South Korea
  • fYear
    1997
  • fDate
    2-4 Dec 1997
  • Firstpage
    187
  • Lastpage
    189
  • Abstract
    We propose a new PN chip clock generator which employs two synchronous counters to achieve precise control of chip clock in a CDMA code acquisition and code tracking. The proposed clock generator provides a reliable clock without any glitch. Since the chip clock generator can be easily controlled into one of the states: free running, phase advance and phase delay, it can be used for both data processing and code synchronization
  • Keywords
    clocks; code division multiple access; counting circuits; delay circuits; pseudonoise codes; synchronisation; tracking; CDMA; chip clock control; code acquisition; code synchronization; code tracking; data processing; delay lock loop; free running state; phase advance state; phase delay; reliable PN chip clock generation; synchronous counters; Clocks; Correlators; Counting circuits; Delay; Multiaccess communication; Pulse generation; Spread spectrum communication; Synchronization; Synchronous generators; Timing;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Consumer Electronics, 1997. ISCE '97., Proceedings of 1997 IEEE International Symposium on
  • Print_ISBN
    0-7803-4371-9
  • Type

    conf

  • DOI
    10.1109/ISCE.1997.658383
  • Filename
    658383