• DocumentCode
    3215598
  • Title

    Generalized resource sharing

  • Author

    Raje, S. ; Bergamaschi, R.A.

  • Author_Institution
    IBM Thomas J. Watson Res. Center, Yorktown Heights, NY, USA
  • fYear
    1997
  • fDate
    9-13 Nov. 1997
  • Firstpage
    326
  • Lastpage
    332
  • Abstract
    Resource sharing is one of the main tasks in high-level synthesis, and although many algorithms have addressed the problem there are still several limitations which restrict the generality and applicability of current algorithms. Most clique-partitioning-based algorithms use local and inaccurate cost-functions which result in inefficient results. This paper presents algorithms for the resource sharing problem on registers and functional units, and shows how they overcome the limitations of existing algorithms. The main characteristics of this work are: interleaved register and functional unit merging in a global clique partitioning based framework, accurate merging cost estimation, accurate interconnect cost estimation, relative control cost taken into account and efficient false loop elimination. The results obtained show significant improvements in the delay of designs, while also minimizing area, specially for large designs with many sharing possibilities.
  • Keywords
    high level synthesis; logic CAD; clique-partitioning-based algorithms; functional unit; functional units; generalized resource sharing; global clique partitioning based framework; high-level synthesis; interconnect cost estimation; merging cost estimation; sharing possibilities; High-level synthesis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Computer-Aided Design, 1997. Digest of Technical Papers., 1997 IEEE/ACM International Conference on
  • Conference_Location
    San Jose, CA, USA
  • ISSN
    1092-3152
  • Print_ISBN
    0-8186-8200-0
  • Type

    conf

  • DOI
    10.1109/ICCAD.1997.643538
  • Filename
    643538